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Is a programming language used to describe the behavior or structure of digital circuits for simulating the circuit and Verilog is by far the most popular.
In this technique, there is a link between subscriber and network and a local loop.
A technique that can be a solution to the problem of synchronizing data sources.
The complement term for X’.Y’.Z + X.Y will be _____________
New CPU whose instruction set includes the instruction set of its predecessor CPU is said to be ___________ with its predecessor.
What does the symbol D represent in a hexadecimal number system?
The output of a NOR gate is HIGH if ________.
The sequential circuit is also called ___________
The following figure shows a ___________ gate.
Which is the major functioning responsibility of the multiplexing combinational circuit?
Which of the following is not a positional number system?
The binary equivalent of the decimal number 10 is __________
The octal equivalent of 1100101.001010 is ______
For voice, each channel contains a ___ word of digitized data.
The max term when X=Y=Z=1 is ________
The subtraction using 1’s complement of 110 – 100 will give the result ___________
What kind of a flag is the sign flag?
The carry propagation can be expressed as ________
For the device shown here, assume the D input is LOW, both S inputs are LOW and the input is LOW. What is the status of the Y’ outputs?
How many AND, OR and EXOR gates are required for the configuration of full adder?
What is the function of an enable input on a multiplexer chip?
A technique that allocates time slots dynamically.
The min term when X=Y=Z=0 is _____________
Which of the following is the correct representation of a binary number?
The truth table for an S-R flip-flop has how many VALID entries?
7’s complement of 432 is _________________
If a 3-input AND gate has eight input possibilities, how many of those possibilities will result in a HIGH output?
The output of an OR gate with three inputs, A, B, and C, is LOW when ________.
For a two-input XNOR gate, with the input waveforms as shown below, which output waveform is correct?
Which of the following logic expressions represents the logic diagram shown?
A ____________ is a circuit with only one output but can have multiple inputs.
The number of sign bits in a 32-bit IEEE format __________
What could be the maximum value of a single digit in an octal number system?
The 9’s complement of 6578 is ___________
Opcode indicates the operations to be performed.
Number of outputs in a half adder _____________
The device shown here is most likely a ________
What is the indication of a short to ground in the output of a driving gate?
WDM stands for?
The 32 bit representation of the decimal number is called as ____
Most demultiplexers facilitate which type of conversion?
In double precision format, the size of the mantissa is ______
How many select lines would be required for an 8-line-to-1-line multiplexer?
What is the 1’s complement of 11010?
Convert (52)16 into its decimal equivalent.
Let r denote number system radix. The only value(s) of r that satisfy the equation 12
A basic S-R flip-flop can be constructed by cross-coupling of which basic logic gates?
Which of the following correctly describes the distributive law.
In a number system, each position of a digit represents a specific power of the base.
The binary number 111 in octal format is ________________
How many types of sequential circuits are?
>> operator is used to denote _________
It is rooted in binary code, a series of zeroes and ones each having an opposite value.
If a signal passing through a gate is inhibited by sending a LOW into one of the inputs, and the output is HIGH, the gate is aNo:
In a multiplexer the output depends on its ___________
Which of the circuits in figure (a to d) is the sum-of-products implementation of figure (e)?
The length of a register is called _______
The Output is LOW if any one of the inputs is HIGH in case of a _________ gate.
In this type of multiplexing time slots are preassigned to sources and fixed.
One multiplexer can take the place of ___________
The number of literals in the expression F=X.Y’ + Z are _____________
In 1-to-4 demultiplexer, how many select lines are required?
Convert (22)8 into its corresponding decimal number.
The result of X+X.Y is X.
The value of radix in binary number system is _____________
The input hexadecimal representation of 1110 is _______________
Latches constructed with NOR and NAND gates tend to remain in the latched condition due to which configuration feature?
A computer language that is written in binary codes only is _____
The logic circuits whose outputs at any instant of time depends only on the present input but also on the past outputs are called
In parts of the processor, adders are used to calculate ____________
The decimal value 0.5 in IEEE single precision floating point representation has
The _________ holds the contents of the accessed memory word.
In TDM, the samples occupy adjacent time slots.
The minterm of any expression is denoted by ___________
There are 5 universal gates.
In the hexadecimal system, we allow _______ values for each digit of a number
The 1’s complement of 1111111110.101 is _______________
The 16’s complement of 74E will be __________
Output will be a LOW for any case when one or more inputs are zero for aNo:
Which of the following is not a binary number?
Which combinational circuit is renowned for selecting a single input from multiple inputs & directing the binary information to output line?
The normalized representation of 0.0010110 * 2 9 is _______
The binary number 1110 in hexadecimal format is _____________
3 bits full adder contains ________
What is a multiplexer?
The ________ gate is an OR gate followed by a NOT gate.
The result obtained on subtraction using 2’s complement of 1111-0010 will be _________
P is a 16-bit signed integer. The 2's complement representation of P is (F87B)16.The 2's complement representation of 8*P
A bit in a computer terminology means either 0 or 1.
Which of the following is not a visible register?
The 10’s complement of 562 is __________
The maximum number of bits sufficient to represent a hexadecimal number in binary:
Convert the binary equivalent 10101 to its decimal equivalent.
In the IEEE floating point representation, the hexadecimal value 0 × 00000000 corresponds to
What is the complement of X’Y’Z?
What is correct instruction if you want the control to go to the location 2000h?
Which of the following gates has the exact inverse output of the OR gate for all possible input combinations?
The format used to present the logic output for the various combinations of logic inputs to a gate is called aNo:
Which of the following is a data transfer instruction?
A system in which two channels are dedicated to transfer data.
ABC is a valid hexadecimal number.
If a 3-input NOR gate has eight input possibilities, how many of those possibilities will result in a HIGH output?
How many AND gates are required to realize the following expression Y=AB+BC?
The word demultiplex means ___________
Convert 111 110 010 from base 2 to base 8
Many time slots are wasted in __________
Which of the following is correct for a gated D-type flip-flop?
It is possible for an enable or strobe input to undergo an expansion of two or more MUX ICs to the digital multiplexer with the proficiency of large number of ___________
(1217)8 is equivalent to
Which of the following logical operations is represented by the + sign in Boolean algebra?
Controlling the frequency is referred as _________
A digital multiplexer is a combinational circuit that selects ___________
The numbers written to the power of 10 in the representation of decimal numbers are called as _____
One example of the use of an S-R flip-flop is as ___________
Convert the binary number 11001 to decimal.
The complement of the input given is obtained in case of:
Why is a demultiplexer called a data distributor?
Boolean Function is of the form of ________
CPU has built-in ability to execute a particular set of machine instructions, called as __________
What type of logic circuit is represented by the figure shown below?
Whose operations are more faster among the following?
The Boolean expression for a 3-input AND gate is ________.
When both inputs of a J-K flip-flop cycle, the output will ___________
Which of the following combinations of logic gates can decode binary 1101?
2’s complement is obtained by adding 1 to 1’s complement of a number.
The expression of a NAND gate is_______
The smallest integer that can be represented by an 8-bit number in 2’s complement form is
The output of an AND gate with three inputs, A, B, and C, is HIGH when ________.
In the boolean function w=f(X,Y,Z), what is the RHS referred to as ________
The general form for calculating the number of rows in a truth table is ________
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