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# Intro to Hardware Description Language

Is a programming language used to describe the behavior or structure of digital circuits for simulating the circuit and Verilog is by far the most popular.

## arduino

A basic S-R flip-flop can be constructed by cross-coupling of which basic logic gates?

• AND or OR gates
• XOR or XNOR gates
• AND or NOR gates
• NOR or NAND gates

>> operator is used to denote _________

• less than
• greater than
• right shift
• left shift

(1217)8 is equivalent to

• (2297)10
• (1217)16
• (028F)16
• (0B17)16

Boolean Function is of the form of ________

• Truth values
• Algebraic Expression
• Truth Table
• K=f(X,Y,X)

The min term when X=Y=Z=0 is _____________

• x’+y’+z’
• x+y+z
• xyz
• x’y’z’

In this technique, there is a link between subscriber and network and a local loop.

• DSDL
• SSDL
• TSDL
• ASDL

The complement of the input given is obtained in case of:

• EX-OR
• NOR
• AND+NOR
• NOT

The device shown here is most likely a ________

• Inverter
• Multiplexer
• Comparator
• Demultiplexer

What type of logic circuit is represented by the figure shown below?

• AND
• NAND
• XNOR
• XOR

How many select lines would be required for an 8-line-to-1-line multiplexer?

• 3
• 8
• 4
• 2

The truth table for an S-R flip-flop has how many VALID entries?

• 2
• 1
• 3
• 4

If a 3-input NOR gate has eight input possibilities, how many of those possibilities will result in a HIGH output?

• 7
• 2
• 1
• 8

In the boolean function w=f(X,Y,Z), what is the RHS referred to as ________

• boolean
• expression
• right hand side
• literals

A digital multiplexer is a combinational circuit that selects ___________

• Many decimal inputs and transmits the selected information
• One digital information from several sources and transmits the selected one
• Many digital information and convert them into one
• Many decimal outputs and accepts the selected information

For the device shown here, assume the D input is LOW, both S inputs are LOW and the input is LOW. What is the status of the Y’ outputs?

• All are HIGH
• All but Y0 are LOW
• All are LOW
• All but Y0 are HIGH

The 1’s complement of 1111111110.101 is _______________

• 1.101
• 1111111110.101
• 0000000000.010
• 1.010

How many AND gates are required to realize the following expression Y=AB+BC?

• 4
• 8
• 2
• 1

The octal equivalent of 1100101.001010 is ______

• 624.12
• 145.12
• 154.12
• 145.21

The following figure shows a ___________ gate.

• NOR
• OR
• NAND
• EXOR

The smallest integer that can be represented by an 8-bit number in 2’s complement form is

• -128
• -127
• 0
• -256

The complement term for X’.Y’.Z + X.Y will be _____________

• (X+Y+Z’)(X’+Y)
• (X+Y+Z’)(X’+Y’)
• XYZ’+X’Y’

What kind of a flag is the sign flag?

• Status
• Instruction
• General Purpose

The output of an AND gate with three inputs, A, B, and C, is HIGH when ________.

• A = 1, B = 1, C = 0
• A = 1, B = 1, C = 1
• A = 1, B = 0, C = 1
• A = 0, B = 0, C = 0

The minterm of any expression is denoted by ___________

• Mt
• m
• min

The 16’s complement of 74E will be __________

• F8B2
• 2B8
• 8B2
• 8C2

The format used to present the logic output for the various combinations of logic inputs to a gate is called aNo:

• Boolean variable
• truth table
• Boolean constant
• input logic function

The input hexadecimal representation of 1110 is _______________

• E
• 14
• 0111
• 15

The output of a NOR gate is HIGH if ________.

• any input is LOW
• all inputs are HIGH
• any input is HIGH
• all inputs are LOW

Convert the binary equivalent 10101 to its decimal equivalent.

• 31
• 22
• 21
• 12

How many AND, OR and EXOR gates are required for the configuration of full adder?

• 3, 1, 2
• 1, 2, 2
• 2, 1, 2
• 4, 0, 1

New CPU whose instruction set includes the instruction set of its predecessor CPU is said to be ___________ with its predecessor.

• fully compatible
• backward compatible
• compatible
• forward compatible

The carry propagation can be expressed as ________

• Cp = AB
• All but Y0 are LOW
• Cp = A + B
• All but Y0 are HIGH

The sequential circuit is also called ___________

• Flip-flop
• Latch
• Strobe

What is the indication of a short to ground in the output of a driving gate?

• There is a signal loss to all load gates
• Only the output of the defective gate is affected
• The affected node will be stuck in the HIGH state
• The node may be stuck in either the HIGH or the LOW state

One example of the use of an S-R flip-flop is as ___________

• Switch debouncer
• Racer
• Transition pulse generator
• Astable oscillator

The numbers written to the power of 10 in the representation of decimal numbers are called as _____

• Size factors
• Height factors
• Scale factors
• None of the mentioned

A bit in a computer terminology means either 0 or 1.

• True
• False

The result of X+X.Y is X.

• True
• False

The _________ holds the contents of the accessed memory word.

• PC
• MBR
• IR
• MAR

Which of the following logical operations is represented by the + sign in Boolean algebra?

• complementation
• OR
• AND
• inversion

Which of the following is not a positional number system?

• Hexadecimal Number System
• Roman Number System
• Binary Number System
• Octal Number System

What is a multiplexer?

• It is a type of decoder which decodes several inputs and gives one output
• A multiplexer is a device which converts many signals into one
• It is a type of encoder which decodes several inputs and gives one output
• It takes one input and results into many output

In a number system, each position of a digit represents a specific power of the base.

• True
• False
• 82 * 1 + 81 * 1 + 80 *3.

There are 5 universal gates.

• True
• False

What could be the maximum value of a single digit in an octal number system?

• 6
• 7
• 8
• 5

7’s complement of 432 is _________________

• 345
• 432
• 543
• 777

If a 3-input AND gate has eight input possibilities, how many of those possibilities will result in a HIGH output?

• 2
• 7
• 1
• 8

The binary number 111 in octal format is ________________

• 8
• 5
• 7
• 6

Many time slots are wasted in __________

• FDM
• Synchronous TDM
• TDM
• Asynchronous TDM

The maximum number of bits sufficient to represent a hexadecimal number in binary:

• 3
• 8
• 7
• 4

The max term when X=Y=Z=1 is ________

• xyz
• x’y’z’
• x’+y’+z’
• x+y+z

The number of sign bits in a 32-bit IEEE format __________

• 1
• 11
• 9
• 23

Output will be a LOW for any case when one or more inputs are zero for aNo:

• NOR Gate
• OR Gate
• AND Gate
• NOT Gate

In TDM, the samples occupy adjacent time slots.

• True
• False

In double precision format, the size of the mantissa is ______

• 64
• 52 bit
• 72
• 32 bit

CPU has built-in ability to execute a particular set of machine instructions, called as __________

• Instruction Set
• User instructions
• Registers
• Sequence Set

Latches constructed with NOR and NAND gates tend to remain in the latched condition due to which configuration feature?

• Synchronous operation
• Gate impedance
• Low input voltages
• Cross coupling

In a multiplexer the output depends on its ___________

• Select outputs
• Enable pin
• Select inputs
• Data inputs

A technique that can be a solution to the problem of synchronizing data sources.

• pulse stuffing
• data link control
• framing
• full link control

Convert the binary number 11001 to decimal.

• 3
• 25
• 15
• 13

If a signal passing through a gate is inhibited by sending a LOW into one of the inputs, and the output is HIGH, the gate is aNo:

• NAND
• NOR
• AND
• OR

Controlling the frequency is referred as _________

• phase modulation
• hertz modulation
• amplitude modulation
• frequency modulation

The number of literals in the expression F=X.Y’ + Z are _____________

• 3
• 4
• 2
• 1

WDM stands for?

• Wavelength division multiplexing
• Wave division multiplexing
• Wave dependent multiplexing
• Wavelength dependent multiplexing

Convert 111 110 010 from base 2 to base 8

• 215
• 762
• 125
• 672

In 1-to-4 demultiplexer, how many select lines are required?

• 5
• 3
• 4
• 2

The 32 bit representation of the decimal number is called as ____

• Extended format
• None of the mentioned
• Double-precision
• Single-precision

Which of the following is not a visible register?

• General Purpose Registers
• MAR
• Status Register

The 10’s complement of 562 is __________

• 3
• 7
• 4
• 8

In the IEEE floating point representation, the hexadecimal value 0 × 00000000 corresponds to

• the normalized value +0
• the special value +0
• the normalized value 2-127
• the normalized value 2-126

When both inputs of a J-K flip-flop cycle, the output will ___________

• Be invalid
• Toggle
• Change
• Not change

Convert (52)16 into its decimal equivalent.

• 80
• 28
• 82
• 83

What is the complement of X’Y’Z?

• XYZ’
• X+Y+Z’
• X’+Y+’Z’
• X+YZ

In this type of multiplexing time slots are preassigned to sources and fixed.

• Asynchronous TDM
• FDM
• Synchronous TDM
• TDM

In parts of the processor, adders are used to calculate ____________

• All of the Mentioned
• Increment and decrement operators
• Table indices

The expression of a NAND gate is_______

• (A.B)’
• A’B+AB’
• (A+B)’
• A.B

The length of a register is called _______

• word size
• word limit
• register limit
• register size

Which of the following combinations of logic gates can decode binary 1101?

• One 4-input NAND gate, one inverter
• One 4-input AND gate, one OR gate
• One 4-input AND gate
• One 4-input AND gate, one inverter

In the hexadecimal system, we allow _______ values for each digit of a number

• 2
• 16
• 8
• 10

Which of the following is not a binary number?

• 101
• 000
• 1111
• 11E

What is correct instruction if you want the control to go to the location 2000h?

• RET 2000h
• JMP 2000h
• MOV 2000h
• MOV A, 2000h

Opcode indicates the operations to be performed.

• True
• False

How many types of sequential circuits are?

• 5
• 2
• 4
• 3

P is a 16-bit signed integer. The 2's complement representation of P is (F87B)16.The 2's complement representation of 8*P

• (C3D8)16
• (F878)16
• (987B)16
• (187B)16

Number of outputs in a half adder _____________

• 1
• 3
• 2
• 0

The result obtained on subtraction using 2’s complement of 1111-0010 will be _________

• 11011
• 1011
• 11101
• 1101

What is the 1’s complement of 11010?

• 11011
• 00101
• 11010
• 00110

The binary equivalent of the decimal number 10 is __________

• 1010
• 10
• 0010
• 010

3 bits full adder contains ________

• 3 combinational inputs
• 8 combinational inputs
• 6 combinational inputs
• 4 combinational inputs

Whose operations are more faster among the following?

• Latches
• Sequential circuits
• Combinational circuits
• Flip-flops

The value of radix in binary number system is _____________

• 2
• 8
• 1
• 10

The binary number 1110 in hexadecimal format is _____________

• 15
• 14
• 6
• E

The Output is LOW if any one of the inputs is HIGH in case of a _________ gate.

• AND
• NAND
• NOR
• OR

A system in which two channels are dedicated to transfer data.

• TV
• Cable
• Cable modem
• Modem

For voice, each channel contains a ___ word of digitized data.

• 1
• 2
• 4
• 0

Which of the following logic expressions represents the logic diagram shown?

• X=A’B’+AB
• X=(AB)’+A’B’
• X=(AB)’+AB
• X=AB’+A’B

2’s complement is obtained by adding 1 to 1’s complement of a number.

• True
• False

The ________ gate is an OR gate followed by a NOT gate.

• EXOR
• EXNOR
• NOR
• NAND

Which of the circuits in figure (a to d) is the sum-of-products implementation of figure (e)?

• d
• c
• b
• a

For a two-input XNOR gate, with the input waveforms as shown below, which output waveform is correct?

• a
• b
• c
• d

Which is the major functioning responsibility of the multiplexing combinational circuit?

• Decoding the binary information
• Generation of selected path between multiple sources and a single destination
• Generation of all minterms in an output function with OR-gate
• Encoding of binary information

Which of the following is the correct representation of a binary number?

• 1110
• (000)2
• (124)2
• (110)2

Which of the following is correct for a gated D-type flip-flop?

• The output complement follows the input when enabled
• Only one of the inputs can be HIGH at a time
• The output toggles if one of the inputs is held HIGH
• The Q output is either SET or RESET as soon as the D input goes HIGH or LOW

Most demultiplexers facilitate which type of conversion?

• Odd parity to even parity
• Single input, multiple outputs
• AC to DC

A ____________ is a circuit with only one output but can have multiple inputs.

• Truth table
• Logic gate
• Binary circuit
• Boolean circuit

What is the function of an enable input on a multiplexer chip?

• To connect ground
• To apply Vcc
• To active one half of the chip
• To active the entire chip

The 9’s complement of 6578 is ___________

• 3124
• 1234
• 3420
• 3421

A computer language that is written in binary codes only is _____

• C
• Pascal
• C#
• machine language

Which of the following gates has the exact inverse output of the OR gate for all possible input combinations?

• AND
• NOR
• NAND
• NOT

The logic circuits whose outputs at any instant of time depends only on the present input but also on the past outputs are called

• Combinational circuits
• Latches
• Sequential circuits
• Flip-flops

Which of the following is a data transfer instruction?

• RET
• STA 16-bit address
• ADD A, B
• MUL C, D

The decimal value 0.5 in IEEE single precision floating point representation has

• fraction bits of 100…000 and exponent value of 0
• fraction bits of 000…000 and exponent value of −1
• fraction bits of 000…000 and exponent value of 0

The subtraction using 1’s complement of 110 – 100 will give the result ___________

• -010
• -011
• 010
• 011

Which combinational circuit is renowned for selecting a single input from multiple inputs & directing the binary information to output line?

• DeMultiplexer
• Both data selector and data distributor
• Data Selector
• Data distributor

Why is a demultiplexer called a data distributor?

• One of the inputs will be selected for the output
• The input will be distributed to one of the outputs
• Single input to Single Output
• The output will be distributed to one of the inputs

The normalized representation of 0.0010110 * 2 9 is _______

• 0 10101010 1110
• 0 10001000 0010110
• 0 10000101 0110
• 0 11110100 11100

It is rooted in binary code, a series of zeroes and ones each having an opposite value.

• Numeric System
• Decimal Base
• Radix Number System
• Digital Logic

Let r denote number system radix. The only value(s) of r that satisfy the equation 12

• any value > 2
• decimal 10
• decimal 11
• decimal 10 and 11

Convert (22)8 into its corresponding decimal number.

• 18
• 28
• 82
• 81

The word demultiplex means ___________

• One into many
• Distributor
• One into many as well as Distributor
• Many into one

A technique that allocates time slots dynamically.

• Statistical TDM
• TDM
• WDM
• Dynamic TDM

The general form for calculating the number of rows in a truth table is ________

• 2n
• -2n
• 2n+1
• 2n-1

ABC is a valid hexadecimal number.

• True
• False

Which of the following correctly describes the distributive law.

• (AB)(A+B)=AB
• (A+B).C=AC+BC
• ( A+B)(C+D)=AB+CD
• (A.B)C=AC.AB

What does the symbol D represent in a hexadecimal number system?

• 8
• 14
• 13
• 16

The Boolean expression for a 3-input AND gate is ________.

• X = A + B + C
• X = ABC
• X = AB
• X = AB + C

The output of an OR gate with three inputs, A, B, and C, is LOW when ________.

• all of the above
• A = 0, B = 1, C = 1
• A = 0, B = 0, C = 1
• A = 0, B = 0, C = 0

It is possible for an enable or strobe input to undergo an expansion of two or more MUX ICs to the digital multiplexer with the proficiency of large number of ___________

• Inputs
• Selection lines
• Enable lines
• Outputs

One multiplexer can take the place of ___________

• Several Ex-NOR gates
• Several SSI logic gates or combinational logic circuits
• Combinational logic circuits
• Several SSI logic gates